In semiconductor technologies, critical-dimension (CD) variations can be introduced when a pre-designed feature is transferred from a photomask to a photoresist layer coated on a semiconductor wafer using a photolithography process, and then from the photoresist layer to the semiconductor wafer using an etching process. CD variation introduced from the etching processing (etching bias) may depend on the thickness and profile of the photoresist layer, and varies from line body to line end. However, the current CD measurements of line end spacing do not fully address the above etch bias effect, and thus provide inaccurate prediction for optical proximity correction (OPC) technology.